Low-temperature co-fired ceramics (LTCC) have been developed recently, which are prepared by firing a conductive layer(s) and a glass ceramic simultaneously. In general, such a conductive layer is made of silver (Ag), copper (Cu), or the like, of which melting points are 962° C. and 1085° C., respectively. Even with this configuration, the glass ceramics prepared by adding a glass component to a dielectric ceramic may be fired at around 900° C., which is lower than the melting points of silver and copper. Therefore, the conductor and the glass ceramics can be fired simultaneously.
The LTCC can be manufactured by the following processes. Namely, a slurry is first prepared by mixing a raw material powder including a dielectric ceramic, glass, and the like sintering agent, an organic binder, a plasticizer, and a solvent. Then the slurry is shaped into a flexible green sheet using a doctor blade molding machine. If required, through-holes can be formed in the green sheet. A conductive paste containing silver, copper, or the like is applied to surfaces in the through-holes and surfaces of the green sheet by a printing process such as screen printing. Finally, a plurality of the resulting green sheets are pressured to be stacked, and then fired at about 900° C.
FIG. 1 is a cross-sectional view showing a low-profile package for a light emitting diode (LED) to which a method for manufacturing LTCCs as described above.
In FIG. 1, glass ceramic layers 1, 2, 3, 4, 5, 6, and 7 are stacked to form a single assembled substrate (or collective substrate). In particular, depending on the action and the position of stacking, the glass ceramic layers 1 and 2 can serve as a reflector layer, the glass ceramic layer 3 can serve as a bonding layer, the glass ceramic layers 4, 5, and 6 can serve as an inner layer, and the glass ceramic layer 7 can serve as an underlayer.
The glass ceramic layers 1 and 2 can be formed to provide a frame structure where a center opening portion is formed. If required, the inner surface of the opening portion may be plated or subject to other processing to form a high reflectance metal layer, such as of silver (not shown). The glass ceramic layers 3, 4, 5, 6, and 7 can be provided with vias 31, 41, 51, 61, and 71, for example, made of copper (Cu) and conductive layers 32, 33, 42, 52, 62, and 72, respectively.
An LED element 8 can be die-bonded on the conductive layer 33 of the glass ceramic layer 3, and can be further connected to the other conductive layer 33 via a bonding wire 9. Lastly, the LED element 8 and the bonding wire 9 can be sealed with a sealing resin layer 10.
FIG. 2 is a flow chart illustrating the method for manufacturing a conventional ceramic multi-layered interconnection substrate, which can be applied to the low-profile package for an LED element shown in FIG. 1.
First, in Step 2101, green sheets 1′ and 2′ (as shown in FIG. 3B) corresponding to the glass ceramic layers 1 and 2 of FIG. 1 can be processed to have respective opening portions, and if required, the inner surface of the opening portion may be electrolytically plated or subject to other processing to form a high reflectance metal layer, such as of silver (not shown). Then green sheets 3′ to 7′ corresponding to the glass ceramic layers 3 to 7 can be processed by laser processing to each have a respective through-hole. Vias and conductive layers can be formed on the surfaces in the through-holes and surfaces of the green sheets 3′ to 7′ by a printing process, such as screen printing.
Next, in Step 2102, as shown in FIG. 3B, the green sheets 1′ to 7′ can be pressed to be stacked. In FIG. 3B, the high reflectance metal layers of the green sheets 1′ and 2′ and the through-holes, the vias and the conductive layers of the green sheets 3′ to 7′ are not illustrated.
Then, in Step 2103, as shown in FIG. 4B, division grooves G1 and G7 can be formed in the uppermost green sheet 1′ and the lowermost green sheet 7′. Note that FIG. 4B also does not show the high reflectance metal layers of the green sheets 1′ and 2′ and the through-holes, the vias and the conductive layers of the green sheets 3′ to 7′.
Next, in Step 2104, the stacked green sheets 1′ to 7′ can be fired at about 900° C. If the conductive layers and the like are made of copper and the like, the green sheets are fired under nitrogen atmosphere to prevent the oxidation of the conductive layers and the like.
Next, in Step 2105, the LED element 8 can be die-bonded onto the conductive layer 33 of the glass ceramic layer 3 (see FIG. 1).
Then, in Step 2106, the LED element 8 and the conductive layer 33 can be connected by a bonding wire 9 (see FIG. 1).
Next, in Step 2107, if desired, the LED element 8 and the bonding wire 9 can be sealed by a sealing resin layer 10 (see FIG. 1).
Lastly, in Step 2108, the stacked ceramic layers can be pressed from the glass ceramic layer 1 side to be broken along the division grooves G1 and G7, so that the respective low-profile packages for an LED element can be separated individually. As a result, the low-profile package for an LED composed of the glass ceramic layers 1 to 7 as shown in FIGS. 5A and 5B can be obtained. In this case, the uppermost glass ceramic layer 1 and the lowermost glass ceramic layer 7 can be observed to have portions G1′ and G7′ which have been formed from the division grooves G1 and G7. In FIGS. 5A and 5B, the high reflectance metal layers of the glass ceramic layers 1 and 2 and the through-holes, the vias, the conductive layers, the LED element 8, the bonding wires 9, and the sealing resin layer 10 of the glass ceramic layers 3 to 7 are not illustrated.
Japanese Patent Application Laid-Open No. 2003-249755 describes a conventional technology in which the division grooves are formed in the uppermost layer and lowermost layer of a ceramic multi-layered interconnection substrate. Japanese Patent Application Laid-Open No. 2008-28065 describes another conventional technology in which division grooves are formed in the upper and lower surfaces of a ceramic interconnection substrate.
However, the conventional methods for manufacturing ceramic multi-layered interconnection substrates may result in lowering the manufacturing yield, leading to manufacturing cost increases.
Specifically, when the low-profile packages for an LED are separated, appropriate breakage sometimes occurs along the predetermined breaking line, for example, shown by the dotted line X1 in FIG. 6 that is substantially vertically directed from the division groove G1 as the start point to the division groove G7 as the end point. However, the position and size of the grain aggregate of the ceramic are not constant and the breakage in the glass ceramic layers 1 to 7 may become inclined as the breakage process proceeds. Accordingly, inappropriate breakage may occur along a breaking line shown by the dotted line X2 in FIG. 6 that is obliquely directed from the division groove G1 as the start point to the deviated point from the division groove G7 as the end point. In this case, the deviated breakage may generate burrs Y or chips Z, resulting in lowering the manufacturing yield.